6502 STUDIO

The MOS Technology 6502 Assembly Editor
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; ═══════════════════════════════════════════
; Fibonacci Sequence Generator
; Computes Fibonacci numbers in zero page
; For the MOS 6502 processor
; ═══════════════════════════════════════════

.org $0600          ; Program start address

; Zero page variables
.define fib_lo  $00 ; Current fib number (low byte)
.define fib_hi  $01 ; Current fib number (high byte)
.define prev_lo $02 ; Previous fib number (low byte)
.define prev_hi $03 ; Previous fib number (high byte)
.define temp_lo $04 ; Temp storage
.define temp_hi $05
.define count   $06 ; Loop counter

start:
    CLD             ; Clear decimal mode
    LDA #$01        ; Initialize first Fibonacci = 1
    STA fib_lo
    LDA #$00
    STA fib_hi
    STA prev_lo     ; Previous = 0
    STA prev_hi
    LDA #$18        ; Compute 24 Fibonacci numbers
    STA count

loop:
    ; Save current fib to temp
    LDA fib_lo
    STA temp_lo
    LDA fib_hi
    STA temp_hi

    ; fib = fib + prev
    CLC
    LDA fib_lo
    ADC prev_lo
    STA fib_lo
    LDA fib_hi
    ADC prev_hi
    STA fib_hi
    BCS overflow    ; Branch if > 65535

    ; prev = temp (old fib)
    LDA temp_lo
    STA prev_lo
    LDA temp_hi
    STA prev_hi

    ; Decrement counter
    DEC count
    BNE loop        ; Continue if count != 0

done:
    BRK             ; Stop execution

overflow:
    ; Handle overflow - just stop
    BRK

Ln 1, Col 129 instructions~56 bytes
x0x1x2x3x4x5x6x7x8x9xAxBxCxDxExF
0x
BRK
2B 7c
---I--
ORA
(a8,X)
2B 6c
NZ----
$02$03$04
ORA
a8
2B 3c
NZ----
ASL
a8
2B 5c
NZC---
$07
PHP
1B 3c
------
ORA
#d8
2B 2c
NZ----
ASL
A
1B 2c
NZC---
$0B$0C
ORA
a16
3B 4c
NZ----
ASL
a16
3B 6c
NZC---
$0F
1x
BPL
r8
2B 3+/2c
------
ORA
(a8),Y
2B 5+c
NZ----
$12$13$14
ORA
a8,X
2B 4c
NZ----
ASL
a8,X
2B 6c
NZC---
$17
CLC
1B 2c
--C---
ORA
a16,Y
3B 4+c
NZ----
$1A$1B$1C
ORA
a16,X
3B 4+c
NZ----
ASL
a16,X
3B 7c
NZC---
$1F
2x
JSR
a16
3B 6c
------
AND
(a8,X)
2B 6c
NZ----
$22$23
BIT
a8
2B 3c
NZ---V
AND
a8
2B 3c
NZ----
ROL
a8
2B 5c
NZC---
$27
PLP
1B 4c
NZCIDV
AND
#d8
2B 2c
NZ----
ROL
A
1B 2c
NZC---
$2B
BIT
a16
3B 4c
NZ---V
AND
a16
3B 4c
NZ----
ROL
a16
3B 6c
NZC---
$2F
3x
BMI
r8
2B 3+/2c
------
AND
(a8),Y
2B 5+c
NZ----
$32$33$34
AND
a8,X
2B 4c
NZ----
ROL
a8,X
2B 6c
NZC---
$37
SEC
1B 2c
--C---
AND
a16,Y
3B 4+c
NZ----
$3A$3B$3C
AND
a16,X
3B 4+c
NZ----
ROL
a16,X
3B 7c
NZC---
$3F
4x
RTI
1B 6c
NZCIDV
EOR
(a8,X)
2B 6c
NZ----
$42$43$44
EOR
a8
2B 3c
NZ----
LSR
a8
2B 5c
NZC---
$47
PHA
1B 3c
------
EOR
#d8
2B 2c
NZ----
LSR
A
1B 2c
NZC---
$4B
JMP
a16
3B 3c
------
EOR
a16
3B 4c
NZ----
LSR
a16
3B 6c
NZC---
$4F
5x
BVC
r8
2B 3+/2c
------
EOR
(a8),Y
2B 5+c
NZ----
$52$53$54
EOR
a8,X
2B 4c
NZ----
LSR
a8,X
2B 6c
NZC---
$57
CLI
1B 2c
---I--
EOR
a16,Y
3B 4+c
NZ----
$5A$5B$5C
EOR
a16,X
3B 4+c
NZ----
LSR
a16,X
3B 7c
NZC---
$5F
6x
RTS
1B 6c
------
ADC
(a8,X)
2B 6c
NZC--V
$62$63$64
ADC
a8
2B 3c
NZC--V
ROR
a8
2B 5c
NZC---
$67
PLA
1B 4c
NZ----
ADC
#d8
2B 2c
NZC--V
ROR
A
1B 2c
NZC---
$6B
JMP
(a16)
3B 5c
------
ADC
a16
3B 4c
NZC--V
ROR
a16
3B 6c
NZC---
$6F
7x
BVS
r8
2B 3+/2c
------
ADC
(a8),Y
2B 5+c
NZC--V
$72$73$74
ADC
a8,X
2B 4c
NZC--V
ROR
a8,X
2B 6c
NZC---
$77
SEI
1B 2c
---I--
ADC
a16,Y
3B 4+c
NZC--V
$7A$7B$7C
ADC
a16,X
3B 4+c
NZC--V
ROR
a16,X
3B 7c
NZC---
$7F
8x$80
STA
(a8,X)
2B 6c
------
$82$83
STY
a8
2B 3c
------
STA
a8
2B 3c
------
STX
a8
2B 3c
------
$87
DEY
1B 2c
NZ----
$89
TXA
1B 2c
NZ----
$8B
STY
a16
3B 4c
------
STA
a16
3B 4c
------
STX
a16
3B 4c
------
$8F
9x
BCC
r8
2B 3+/2c
------
STA
(a8),Y
2B 6c
------
$92$93
STY
a8,X
2B 4c
------
STA
a8,X
2B 4c
------
STX
a8,Y
2B 4c
------
$97
TYA
1B 2c
NZ----
STA
a16,Y
3B 5c
------
TXS
1B 2c
------
$9B$9C
STA
a16,X
3B 5c
------
$9E$9F
Ax
LDY
#d8
2B 2c
NZ----
LDA
(a8,X)
2B 6c
NZ----
LDX
#d8
2B 2c
NZ----
$A3
LDY
a8
2B 3c
NZ----
LDA
a8
2B 3c
NZ----
LDX
a8
2B 3c
NZ----
$A7
TAY
1B 2c
NZ----
LDA
#d8
2B 2c
NZ----
TAX
1B 2c
NZ----
$AB
LDY
a16
3B 4c
NZ----
LDA
a16
3B 4c
NZ----
LDX
a16
3B 4c
NZ----
$AF
Bx
BCS
r8
2B 3+/2c
------
LDA
(a8),Y
2B 5+c
NZ----
$B2$B3
LDY
a8,X
2B 4c
NZ----
LDA
a8,X
2B 4c
NZ----
LDX
a8,Y
2B 4c
NZ----
$B7
CLV
1B 2c
-----V
LDA
a16,Y
3B 4+c
NZ----
TSX
1B 2c
NZ----
$BB
LDY
a16,X
3B 4+c
NZ----
LDA
a16,X
3B 4+c
NZ----
LDX
a16,Y
3B 4+c
NZ----
$BF
Cx
CPY
#d8
2B 2c
NZC---
CMP
(a8,X)
2B 6c
NZC---
$C2$C3
CPY
a8
2B 3c
NZC---
CMP
a8
2B 3c
NZC---
DEC
a8
2B 5c
NZ----
$C7
INY
1B 2c
NZ----
CMP
#d8
2B 2c
NZC---
DEX
1B 2c
NZ----
$CB
CPY
a16
3B 4c
NZC---
CMP
a16
3B 4c
NZC---
DEC
a16
3B 6c
NZ----
$CF
Dx
BNE
r8
2B 3+/2c
------
CMP
(a8),Y
2B 5+c
NZC---
$D2$D3$D4
CMP
a8,X
2B 4c
NZC---
DEC
a8,X
2B 6c
NZ----
$D7
CLD
1B 2c
----D-
CMP
a16,Y
3B 4+c
NZC---
$DA$DB$DC
CMP
a16,X
3B 4+c
NZC---
DEC
a16,X
3B 7c
NZ----
$DF
Ex
CPX
#d8
2B 2c
NZC---
SBC
(a8,X)
2B 6c
NZC--V
$E2$E3
CPX
a8
2B 3c
NZC---
SBC
a8
2B 3c
NZC--V
INC
a8
2B 5c
NZ----
$E7
INX
1B 2c
NZ----
SBC
#d8
2B 2c
NZC--V
NOP
1B 2c
------
$EB
CPX
a16
3B 4c
NZC---
SBC
a16
3B 4c
NZC--V
INC
a16
3B 6c
NZ----
$EF
Fx
BEQ
r8
2B 3+/2c
------
SBC
(a8),Y
2B 5+c
NZC--V
$F2$F3$F4
SBC
a8,X
2B 4c
NZC--V
INC
a8,X
2B 6c
NZ----
$F7
SED
1B 2c
----D-
SBC
a16,Y
3B 4+c
NZC--V
$FA$FB$FC
SBC
a16,X
3B 4+c
NZC--V
INC
a16,X
3B 7c
NZ----
$FF
a88-bit zero page address ($00-$FF)
a1616-bit absolute address ($0000-$FFFF)
d88-bit immediate data
r88-bit relative offset (branches)
+Extra cycle on page boundary crossing
+/2Branch: 2/3/4 cycles (not taken/taken/page cross)
Flags: N=NegativeZ=ZeroC=CarryI=InterruptD=DecimalV=Overflow